Mixed-Signal Design & Verification Engineer Lead

About the role

Monolithic Power Systems (MPS), a worldwide leader in integrated power semiconductors, is looking for a Mixed-Signal Design & Verification Lead to lead, train and mentor its Mixed-Signal Design team. The role defines and leads the development of the Mixed-Signal Design/Verification framework and infrastructure for complex digital and mixed-signal ICs, using leading-edge technologies and industry-standard ASIC tools. Products may cover power management, signal management and mixed-signal functions.

Key responsibilities

• Lead, supervise, mentor and train the Mixed-Signal Design team and supervise multiple projects against quality metrics, deliverables and schedule.
• Take part in the Mixed-Signal Design recruitment process.
• Analog and mixed-signal design, verification and validation, including analog-digital interface definition and documentation.
• Behavioral modelling of analog blocks, analysis of architectural choices and trade-offs.
• Analog and mixed-signal IP definition, development, integration and verification.
• Analog and/or digital mixed-signal simulations and debugging.
• Assist the Digital Design Team with timing, input/output and DFT constraints.
• Support post-silicon validation and characterization.
• Collaborate closely with analog design, analog layout, digital design, digital verification and digital physical engineers.

Required profile

• BSEE with 12 years of experience, or MSEE with 8 years of experience in ASIC mixed-signal design.
• Ability to work independently and collaborate across teams and departments.
• Strong leadership abilities to manage multiple projects and a small group of designers.
• Solid knowledge of the full ASIC development and silicon fabrication process.

Required skills

• Transistor-level and analog/mixed circuit design, device mismatches, noise, linearity and layout design.
• Spectre, HSPICE and Cadence ADE-L/ADE-XL; Monte-Carlo, noise and stability simulations.
• DRC/LVS with Calibre, ICV and Verilog-AMS mixed-mode simulation.
• Verilog, System Verilog and Verilog-A; DFT (SCAN, LBIST, ABIST, IDDQ); STA and timing/I/O constraints.
• Plus: automotive and ASIL standards, power management applications, I2C/I3C/SPI/USB/PMBUS, GitLab and Cliosoft SOS.