Layout Designer Intern (MEMS)

About the role

Analog Devices is offering a Layout Designer Intern position in its MEMS team in Valencia for 2027. The intern works on state-of-the-art microelectromechanical-system (MEMS) products such as accelerometers and gyroscopes, especially the read-out channel ASIC, alongside a diverse international team of design engineers.

Key responsibilities

• Learn IC design layout methods by taking part in a cross-functional team including IC Layout, IC Design, Marketing and Application Engineers.
• Explore detailed analog IC design layout methods and techniques to support next-generation low-power accelerometer and gyro products in an advanced CMOS process.
• Bring block-level designs into layout and learn how real layout effects influence circuit performance.
• Visualize and communicate findings, document work and present it for peer review.
• The specific tasks will be tailored to the candidate's interests.

Required profile

• Pursuing an Electrical Engineering degree (BS or MS) or equivalent.
• Keen eye for detail, motivated and results-oriented, with strong organizational skills.
• Good technical writing, presentation and communication skills, and willingness to learn quickly.

Required skills

• Knowledge of device physics and semiconductor processing is a plus.
• Experience with Cadence Virtuoso, including VXL, is a plus.
• Experience interpreting and debugging verification (LVS/DRC) is a plus.

Applicants needing access to technical data may have to undergo an export licensing review. The position requires no travel.