Senior AMS Design Verification Engineer

About the role

Analog Devices' Custom Silicon Solutions (CSS) group is looking for an experienced Senior AMS Design Verification Engineer to develop new product solutions for portable consumer applications. The role works directly with Tier 1 OEMs and offers supervisor and mentor leadership opportunities within a multi-disciplinary, multi-site team.

Key responsibilities

• Act as a mixed-signal verification team member in a Digital/Analog/DV/Implementation/Layout team
• Contribute to verification strategy and methodology improvements
• Understand device requirements and define a traceable AMS verification plan
• Generate SVRNM models of analog blocks and validate them against the schematic
• Develop directed tests in the AMS environment or reuse constrained-random UVM test cases
• File and track bugs to closure in Jira and document task results with the team

Required profile

• Electronic engineering degree with 5+ years of chip-level AMS verification experience
• Familiarity with digital mixed-signal verification (DMS) using UVM
• Experience with mixed-signal simulators such as Cadence AMS or equivalent
• Experience creating schematics, simulator and netlist options
• Strong coding, object-oriented programming and documentation skills
• Good analysis and debugging skills; some limited travel (about 10% of the time)

Required skills

• Cadence AMS flow and mixed-signal simulation
• SVRNM or VerilogAMS behavioural modelling
• UVM and Python, C or Perl scripting (advantageous)

What we offer

• Pay range in Cortes Valencianas of 43,120 to 62,440 EUR
• Discretionary performance-based bonus
• Possible variable compensation, paid annual leave and supplemental benefits depending on local policy