Sr/Staff Mixed-Signal Design & Verification Engineer

About the role

Monolithic Power Systems (MPS) is looking for a Senior or Staff Mixed-Signal Design and Verification Engineer to lead mixed-signal IC design and verification tasks. The engineer works on complex mixed-signal chips using ASIC tools, covering power management, signal management and mixed-signal functions, and collaborates closely with analog, digital and layout engineers.

Key responsibilities

• Help train and mentor the Mixed-Signal Design team and supervise several projects against quality metrics, deliverables and schedule.
• Take part in the Mixed-Signal Design recruitment process.
• Analog and mixed-signal design, verification and validation, including analog-digital interface definition and documentation.
• Behavioral modelling of analog blocks, analysis of architectural choices and trade-offs, and definition, development, integration and verification of analog and mixed-signal IP.
• Analog and mixed-signal simulation and debugging, and post-silicon validation and characterization support.
• Assist the Digital Design team with timing, input/output and DFT constraints.
• Collaborate with analog design, analog layout, digital design, digital verification and digital physical engineers.

Required profile

• Staff position: BSEE with 12 years of experience or MSEE with 8 years; Senior position: BSEE with 7 years or MSEE with 5 years in ASIC mixed-signal design.
• Ability to work independently and collaborate across teams, with strong leadership for multiple projects.
• Solid knowledge of the full ASIC development and silicon fabrication process.

Required skills

• Transistor-level and analog/mixed circuit design, device mismatches, noise, linearity and layout design.
• Spectre, HSPICE and Cadence ADE-L/ADE-XL; Monte-Carlo, noise and stability simulations.
• DRC/LVS with Calibre, ICV and Verilog-AMS mixed-mode simulation.
• Verilog, System Verilog and Verilog-A; DFT techniques (SCAN, LBIST, ABIST, IDDQ).
• STA and mixed-signal timing and I/O constraints for synthesis and place-and-route.
• Plus: automotive ASIL standards, power management applications, I2C/I3C/SPI/USB/PMBUS, GitLab and Cliosoft SOS.