Senior IC Layout Engineer

About the role

Monolithic Power Systems (MPS), a worldwide leader in integrated power semiconductors, is looking for a Senior IC Layout Engineer with 7+ years of experience to lead IC layout activities from floorplanning through tape-out. The role calls for strong technical ownership, deep knowledge of IC layout fundamentals and a proven track record of delivering production silicon.

Key responsibilities

• Lead block-level and top-level IC layout from floorplan definition to tape-out
• Own layout technical decisions, ensuring quality, robustness and manufacturability
• Plan, estimate and track layout schedules, milestones and progress
• Coordinate layout execution across blocks and contributors to ensure on-time delivery
• Ensure compliance with layout verification requirements (DRC, LVS, ERC, DFM)
• Collaborate with design, verification and foundry teams to resolve layout issues
• Review and sign off layout deliverables and mentor junior engineers as needed

Required profile

• 7+ years of hands-on IC layout experience
• Bachelor's or Master's degree in Electrical Engineering or a related field
• Fluent written and spoken English
• Proven ability to lead layout from floorplan to tape-out
• Deep understanding of IC layout fundamentals
• Experience with layout planning, effort estimation and progress tracking
• Excellent problem-solving skills, attention to detail and teamwork

Required skills

• Proficiency with industry-standard IC layout tools
• Layout verification (DRC, LVS, ERC, DFM)